AMD this week launched its 2nd Gen Epyc processor at the AMD Epyc Horizon held in San Francisco, two years after the launch of the first generation Epyc in 2017. Based on 7nm process technology, the new Rome Epyc processors (“7002 Series”) are the next phase of AMD’s attempt to finally wrestle server market share away from rival Intel.

The First Gen (“7001 Series”) Epyc saw AMD gain a foothold in the low single-digits; now AMD wants to move the needle for market share into the double digits. But does the new processor have what it takes to succeed?

Highest performance x86 chip

The 7002 Series Epyc are the world’s “highest performance” x86 processors, Dr Lisa Su said as she opened the keynote, referencing various record-setting benchmarks that were revealed for the first time. Benchmarks of the new Epyc chips furnished by AMD appears to support the company’s assertion of the improvements, ranging from 15 percent more instructions per clock to two times the floating point throughput of the original Epyc.

The Zen 2 architecture that the 7002 Epyc is built on uses an evolved hybrid multi-die approach that decouples the CPU cores from the I/O circuitry. As we reported last year, the former is built around 7nm compute modules, paired with a 14nm dedicated I/O die. At the launch, AMD spokespersons reiterated that the use of a non-monolithic design not only results in better yield but allows the company to bring new capabilities to market much faster.

The result is a processor that sets a record in core count for a x86 processor, sporting up to 64 cores with 128 threads and drawing 225 watts of power at the top end. Each chip can work with up to 8 channels of DDR4-3200 memory for 4TB memory per chip and supports 128 lanes of cutting-edge PCIe 4.0. The high core density means that more performance can be packed into a single server rack, while drawing the same power due to the more efficient 7nm process technology.

Crucially, the original Epyc chip has given AMD a foothold in data centers that should make the 7002 Epyc chips a much easier sell. AMD says the Epyc is currently found on over 60 platforms and powers more than 50 types of public cloud instances. The 7002 Epyc chip is also compatible with 7001 Epyc platforms, with some minor caveats relating to lower I/O performance and TDP.

Security? There’s a chip for that

With all the attention on the performance of the Epyc platform, it is easy to overlook the priority that AMD placed on security. The 7001 Series chips delivered built-in security capabilities such as memory encryption and defenses against side-channel attacks. AMD claims increased depth and optimization to these features for the 7002 processors, enabled by a dedicated AMD Secure Processor within the I/O die.

For the uninitiated, the AMD Secure Processor is a 32-bit processor based on Arm Cortex-A5 in the 7002. The irony of an RISC chip running in a CISC SoC aside, the AMD Secure Processor runs its own secure OS and serves as a hardware root of trust for secure key generation and management for two key features: Security Memory Encryption (SME) and Secure Encryption Virtualization (SEV).

The idea is simple: Thwart attacks against physical memory with AES-128 encryption engines integrated directly into memory channels (SME). The 7002 Series doubles down on this with a new “virtual-transparent capability” in SEV to work with unmodified guest VM, as well as increasing encryption keys to 509, up from 15 previously.

This means that separation between virtual machines is ensured by encrypting the memory space of each virtual machine with a unique key. But why offer support for more keys than the maximum virtual machines that can be loaded? The highest-end Epyc chip currently offers 128 threads. According to Kevin Lepak, a chief architect at AMD, the company is preparing for a future where the same protection is offered to individual containers and is doing its part to ensure an abundance of security resources.

Various enterprise Linux distribution including those from Red Hat, Ubuntu and Fedora already support SEV, and AMD promises more will be added. Indeed, VMware announced at the keynote that it will add support in vSphere by this year.

A growing ecosystem

AMD has worked hard to build up a strong ecosystem around its Epyc platform, touting more than 60 partners on day one of the launch.

Only a relatively short segment of the launch was spent introducing the new chip line-up and its capabilities - Instead, a long string of representatives from various cloud providers, original equipment makers and end-users were ushered on stage to talk about their plans to deploy the new server chips.

HPE and Lenovo announced the immediate availability of new platforms based on the 7002 Series Epyc, with HPE tripling its AMD portfolio. Google says it is already using the new Epyc chip on production systems internally and plans to offer Epyc on Google Cloud by late 2019.

Jennifer Fraser, senior director of Engineering at Twitter shared about how the new Epyc chips will allow her organization to scale out its compute clusters with more cores in less space - and achieve a 25 percent lower TCO. Fraser says Twitter will deploy the 7002 Series Epyc processors in its data centers later this year.

Microsoft also announced the preview of new Azure virtual machines for general purpose applications, including limited previews of cloud-based remote desktops and HPC workloads based on the new processors. At the launch, it also showcased its custom-designed 1U dual-processor Epyc server that is currently deployed on Azure.

Gunning for Intel

When AMD first introduced Rome and launched its Radeon GPUs last year, it took pains to highlight that it is committed to the data center and is here to stay. By successfully delivering the promised second-generation line-up, there is no question that AMD is now in a much stronger position than before to replace Intel in the data center.

The strong performance is also added icing on the cake. Indeed, AMD is suggesting that enterprises replace two socket Intel servers with single-socket servers equipped with its new Epyc chips, arguing that the latter offer comparable performance to the former. According to data center group SVP Forrest Norrod, the disparity in performance was because Rome was originally designed to compete favorably with Intel’s “Ice Lake” Xeons, which got delayed.

The 7002 Series Epyc chips are now on par with the peak production volumes of the 7001 Epyc, Scott Aylor, the corporate vice president of Datacenter Solutions, said.

“We've been ramping to kind of fully satisfy the needs of our customers at more scale over the course of the first quarter or so. We've already started to see the ramp happen and we see that we're performing very well,” said Aylor.

For now, it is worth remembering that the 2nd Gen Epyc is just one milestone on AMD’s roadmap. In a technical briefing, AMD CTO Mark Papermaster offered assurances that progress on “Zen 3” is on track, while design work with “Zen 4” is “well underway.”

He added: “We know it's a highly competitive environment that we are in. But for us, it's personal. We will not let up. You have our commitment."