E4 Computer Engineering has deployed a small high-performance computing cluster sporting RISC-V chips.

The Monte Cimone system, developed with the Università di Bologna and Italian supercomputing center CINECA, will be used for the co-design of HPC applications on RISC-V architecture.

Monte Cimone
– E4 Computer Engineering

RISC-V is an open standard instruction set architecture (ISA), provided under open source licenses that do not require fees to use.

The Monte Cimone system consists of six dual-board servers, each board of which features one SiFive Freedom U740 RISC-V processor SoC, 16 GB of 64-bit DDR memory operating at 1866s MT/s and high-speed interconnects with PCIe Gen 3 x8 operating at 7.8GB/s, one Gigabit Ethernet, and four USB 3.2 Gen 1.

The system includes a 1TB NVME2280 SSD Module storage. It runs a fully operational open source HPC software stack.

“I am extremely excited by the results we achieved with Monte Cimone, which demonstrate remarkable maturity of the RISC-V software stack and tools for HPC," Professor Luca Benini, Full professor of Electronics at DEI-UNIBO and Chair of Digital Circuits and Systems at ETH Zurich, said.

"I believe that RISC-V based HPC machines are not far, and Monte Cimone will be instrumental to get there faster."

Prof. Benini is also a member of the European Processor Initiative consortium, which plans to use a RISC-V based accelerator for the EU's upcoming supercomputers.

“As a supercomputing center, we are very interested in the RISC-V technology to support the scientific community," Dr. Daniele Cesarini, HPC Specialist at CINECA.

"We believe that Monte CIMONE will be the harbinger of the next generation of supercomputers based on RISC-V technology and we will continue to work in synergy with E4 Computer Engineering and the Università di Bologna to prove that RISC-V is ready to stay on the shoulder of the HPC giants.”

Monte Cimone is currently undergoing the final validation tests at the Università di Bologna's DEI-UNIBO division, while a smaller version is at E4’s R&D lab for further developments. Once validated, Monte Cimone will be moved to the CINECA data center in Rome.

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